module scoreboard(input bit Y, A, B);
        reg Y_sb, truth_table[2][2];

        initial begin 
                truth_table[0][0] = 0;
                truth_table[0][1] = 0;
                truth_table[1][0] = 0;
                truth_table[1][1] = 1;
        end

        always @(A or B) 
            begin
                    Y_sb = truth_table[A][B];
                    #2 $display("%t - %b%b: Y_sb=%b, Y=%b(%0s)", $time, A, B, Y_sb, Y, ((Y_sb == Y)? "Match":"Mis-Match"));
            end
endmodule
